Dr. Muralidharan J

Dr. Muralidharan J, N. Muthukumaran, R. Ranjith Kumar, M. Rubika, “Smart Shopping Trolley System using IoT” Journal of Physics: Conference Series (JoP), Vol 1973 Pages 1 – 7, July 2021. ISSN 1742-6588 (INDEXED in SCOPUS)

Dr. Muralidharan J, Saran S, Tamilkavi G, Thivakar S, Vivin M, “An Automatic Fluid Filling Mechanism Using Delta PLC” Journal of Physics: Conference Series (JoP), Vol 1973 Pages 1 – 7, July 2021. ISSN 1742-6588 (INDEXED in SCOPUS)

M P Rajakumar, K.Kavitha, Dr. M. Prasad, Dr K. Sampath Kumar, Dr. Muralidharan J, “IoT Enabled Closed-Circuit Television Surveillance Monitoring using Backward-Channel Compression” European Journal of Molecular & Clinical Medicine (EJMCM), Vol 7 Issue 2 Pages 3258-3263, 2020. ISSN 2515-8260 (INDEXED in SCOPUS)

Muralidharan Jayabalan, Aswini Valluri, “ Leakage Current Alleviation Techniques for SRAM Cell ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)

Venkat Subba Rao. Manchala, J. Muralidharan, D.Rajendra, “ Different Types of Ultra-low Power Energy-Harvesting Design Techniques for IoT Applications ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS,)

Nadendla Bindu Priya, Muralidharan Jayabhalan, “ A 5 Bit 600MS/S Asynchronous Digital Slope ADC with Modified Strong Arm Comparator ” International Journal of Engineering and Advanced Technology (IJEAT) Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)

Hima Bindu Katikala, Sadulla Shaik, Muralidharan Jayabalan, Yatavakilla Amarendra Nath “ Design Consideration for Developing Bio-potential Instrumentation Amplifier Intended for Bionic Eye ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)

Muralidharan Jayabalan, Ahmed Faisal Siddiqi, Oleg Kuzichkin, Aleksandr Yuvenal’evich Krasnopevtsev and Mohammad Salmani, “Role of stress triaxiality on performance of solder joints with different Geometries” Material Research Express (MRE), Vol. 6, No. 7, April 2019. (INDEXED in SCI-E, WoS & SCOPUS, SJR – 0.353, Impact Factor = 1.191)

Aswini Valluri, Muralidharan Jayabalan, “Reduction of Power in SRAM Cell with Gated VDD Methodology” International Journal of Recent Technology and Engineering (IJRTE), Vol. 7, No 5S4, February 2019, ISSN: 2277-3878 (INDEXED in SCOPUS)

J.Muralidharan and Dr. P.Manimegalai, “Current Comparison Domino based CHSK Domino Logic Technique for Rapid Progression and Low Power Alleviation”, International Journal of Electrical and Computer Engineering (IJECE), Vol.7, No 5, October 2017, Page No. 2468 to 2473, ISSN : 2088-8708. (INDEXED in SCOPUS).

J.Muralidharan and Dr. P.Manimegalai, “Conceptual Improvisation on Low Power Mitigation for Domino Logic Systems using CHSK Domino Logic”, Indian Journal of Science and Technology (IJST), Vol.9, No. 16, April 2016, Page No. 1 to 8, ISSN (Print) : 0974-6846 & ISSN (Online) : 0974-5645. (INDEXED in SCOPUS)

J.Muralidharan and Dr. P.Manimegalai, “A Literature Survey and Investigation of Various High Performance Domino Logic Circuits”, ARPN Journal of Engineering and Applied Sciences (ARPN JEAS), Vol.11, No. 5, March 2016, Page No. 3456 to 3464, ISSN 1819-6608. (INDEXED in SCOPUS)

J.Muralidharan and Dr. P.Manimegalai, “An Integrated Switching Technique for Minimizing Power Consumption Using MDFSD in Domino Logic System”, International Journal of Applied Engineering Research (IJAER), Vol.11, No 4 (2016), Page No. 2298-2304, ISSN 0973-4562. (INDEXED in SCOPUS)

R. Valarmathi, Mohammed Abdul Matheen, J. Muralidharan and P.T. Kalaivaani, “Digital Filters Optimisation using Residual Learning Model Digital Filters for Coherent Optical Receivers” ICTACT Journal on Microelectronics, Vol 09, Issue 01, Page No. 1508 – 1512. ISSN: 2395-1680 (online). (INDEXED in UGC CARE)

Muralidharan Jayabalan, E. Srinivas, Francis H. Shajin, P.Rajesh, “On Reducing Test Data Volume for Circular Scan Architecture Using Modified Shuffled Shepherd Optimization” Journal of Electronic Testing, Theory and Applications, Vol 37 Issue 5-6, Page No. 577 – 592. ISSN 0923-8174 (INDEXED in SCI)

Aswini Valluri, Sarada Musala and Muralidharan Jayabalan, “Design of Area Efficient, Low-Power and Reliable Transmission Gate-based 10T SRAM Cell for Biomedical Application” Journal of Engineering Research, Vol 10 No. 1(A), Page No. 161 – 174. ISSN: 2307-1877 (INDEXED in SCIE)

Received a grant amount of Rs.93,000/- from AICTE – ISTE to conduct Six days online Refresher/Induction program on “Neuromorphic Computing for AI” during 24.12.2021 to 31.12.2021.

Received a grant amount of Rs.12,32,500/- from Ministry of Micro, Small and Medium Enterprises (MSME) project titled as “Modern electrophoresis device for early detection of sickle cell anaemia among the tribal communities in India” during the year 2022.

Successfully completed Cadence Certification Course on Basic Static Timing Analysis v2.0.

NPTEL Course completed on “Digital Circuits” with ELITE grade.

NPTEL Course completed on “Design, Technology and Innovation” with ELITE with SILVER grade.

NPTEL Course completed on “Design Thinking – A Primer” with ELITE with SILVER grade.

Doctor of Philosophy in Electronics and Communication Engineering from Karpagam Academy of Higher Education.

Master of Engineering in Applied Electronics from Kumaraguru College of Technology, Anna University.

Bachelor of Engineering in Electronics and Communication Engineering from Sri Krishna College of Engineering and Technology, Anna University.

Recognized as an exceptional contribution as a Coordinator in Smart India Hackathon, 2022.

Delivered a lecture on Electrical Testing as a Resource person in Anna University Sponsored Online Six days FDTP on Electronics Packaging and Testing held during 25.07.2022 to 30.07.2022.

Delivered a lecture on Supervised and Unsupervised Learning as a Resource person in AICTE-ISTE Sponsored Six days Induction/Refresher Programme on Neuromorphic Computing for AI held during 24.12.2021 to 31.12.2021.

A Indian Patent entitled as “A Continuous Non-Radiative Electrical Impedance Tomography Computation System for Neonatal Brain Care” was PUBLISHED on June 2021.

A Indian Patent entitled as “A Multi Objective Reinforcement Learning Based Dynamic Resource Allocation for Low Power IoT Networks” was PUBLISHED on August 2021.

A Indian Patent entitled as “Resource Assistance for Learning Allocation to Multi-Purpose Reinforcement for Unmanned Aerial Vehicles Using IoT Networks” was PUBLISHED on September 2021.

A Indian Patent entitled as “A Deep Learning Framework for Alzheimer Detection from MR Images” was PUBLISHED on September 2021.

A Patent entitled as “A Submarine Drone to Monitor and Digest Blocks in Pipelines and Drainages” was Published on April 2022

A Patent entitled as “Deep Learning Based Technique for Intrusion Detection in IoT Based Electric Vehicle Charging Stations” was Published on August 2023

An Australian Patent entitled as “A Method of Designing Advertisement Boards using Conductive 3D Printable Electronic Sensors.” was GRANTED on August 2020.

An Indian Patent entitled as “Solar Powered Watering System for Managing Plants in the Balcony Garden” was PUBLISHED on May 2020.

An Indian Patent entitled as “Method for Automatic Health Prediction using Machine Learning” was PUBLISHED on January 2020.

An Indian Patent entitled as “Data Traffic Analysis Based IoT Detection using Honeynet DA Classification Technique” was PUBLISHED on November 2019.

Indian Society for Technical Education (ISTE) Life Time Member ID: LM131958

Institute of Research Engineers and Doctors (IRED) Associate Member (ID No. AM101000585061)

International Society for Research and Development (ISRD) Member (ID No. M4150902752)

International Association of Engineers (IAENG) Member (ID No. 127539)

Dr Muralidharan J

Dr Muralidharan J SCOPUS Author Profile

Dr Muralidharan J ORCID Author Profile