Dr. Muralidharan J, N. Muthukumaran, R. Ranjith Kumar, M. Rubika, “Smart Shopping Trolley System using IoT” Journal of Physics: Conference Series (JoP), Vol 1973 Pages 1 – 7, July 2021. ISSN 1742-6588 (INDEXED in SCOPUS)
Dr. Muralidharan J, Saran S, Tamilkavi G, Thivakar S, Vivin M, “An Automatic Fluid Filling Mechanism Using Delta PLC” Journal of Physics: Conference Series (JoP), Vol 1973 Pages 1 – 7, July 2021. ISSN 1742-6588 (INDEXED in SCOPUS)
M P Rajakumar, K.Kavitha, Dr. M. Prasad, Dr K. Sampath Kumar, Dr. Muralidharan J, “IoT Enabled Closed-Circuit Television Surveillance Monitoring using Backward-Channel Compression” European Journal of Molecular & Clinical Medicine (EJMCM), Vol 7 Issue 2 Pages 3258-3263, 2020. ISSN 2515-8260 (INDEXED in SCOPUS)
Muralidharan Jayabalan, Aswini Valluri, “ Leakage Current Alleviation Techniques for SRAM Cell ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)
Venkat Subba Rao. Manchala, J. Muralidharan, D.Rajendra, “ Different Types of Ultra-low Power Energy-Harvesting Design Techniques for IoT Applications ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS,)
Nadendla Bindu Priya, Muralidharan Jayabhalan, “ A 5 Bit 600MS/S Asynchronous Digital Slope ADC with Modified Strong Arm Comparator ” International Journal of Engineering and Advanced Technology (IJEAT) Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)
Hima Bindu Katikala, Sadulla Shaik, Muralidharan Jayabalan, Yatavakilla Amarendra Nath “ Design Consideration for Developing Bio-potential Instrumentation Amplifier Intended for Bionic Eye ” International Journal of Engineering and Advanced Technology (IJEAT), Vol. 9 No. 1S5, December, 2019. ISSN: 2249 – 8958. (INDEXED in SCOPUS)
Muralidharan Jayabalan, Ahmed Faisal Siddiqi, Oleg Kuzichkin, Aleksandr Yuvenal’evich Krasnopevtsev and Mohammad Salmani, “Role of stress triaxiality on performance of solder joints with different Geometries” Material Research Express (MRE), Vol. 6, No. 7, April 2019. (INDEXED in SCI-E, WoS & SCOPUS, SJR – 0.353, Impact Factor = 1.191)
Aswini Valluri, Muralidharan Jayabalan, “Reduction of Power in SRAM Cell with Gated VDD Methodology” International Journal of Recent Technology and Engineering (IJRTE), Vol. 7, No 5S4, February 2019, ISSN: 2277-3878 (INDEXED in SCOPUS)
J.Muralidharan and Dr. P.Manimegalai, “Current Comparison Domino based CHSK Domino Logic Technique for Rapid Progression and Low Power Alleviation”, International Journal of Electrical and Computer Engineering (IJECE), Vol.7, No 5, October 2017, Page No. 2468 to 2473, ISSN : 2088-8708. (INDEXED in SCOPUS).
J.Muralidharan and Dr. P.Manimegalai, “Conceptual Improvisation on Low Power Mitigation for Domino Logic Systems using CHSK Domino Logic”, Indian Journal of Science and Technology (IJST), Vol.9, No. 16, April 2016, Page No. 1 to 8, ISSN (Print) : 0974-6846 & ISSN (Online) : 0974-5645. (INDEXED in SCOPUS)
J.Muralidharan and Dr. P.Manimegalai, “A Literature Survey and Investigation of Various High Performance Domino Logic Circuits”, ARPN Journal of Engineering and Applied Sciences (ARPN JEAS), Vol.11, No. 5, March 2016, Page No. 3456 to 3464, ISSN 1819-6608. (INDEXED in SCOPUS)
J.Muralidharan and Dr. P.Manimegalai, “An Integrated Switching Technique for Minimizing Power Consumption Using MDFSD in Domino Logic System”, International Journal of Applied Engineering Research (IJAER), Vol.11, No 4 (2016), Page No. 2298-2304, ISSN 0973-4562. (INDEXED in SCOPUS)
R. Valarmathi, Mohammed Abdul Matheen, J. Muralidharan and P.T. Kalaivaani, “Digital Filters Optimisation using Residual Learning Model Digital Filters for Coherent Optical Receivers” ICTACT Journal on Microelectronics, Vol 09, Issue 01, Page No. 1508 – 1512. ISSN: 2395-1680 (online). (INDEXED in UGC CARE)
Muralidharan Jayabalan, E. Srinivas, Francis H. Shajin, P.Rajesh, “On Reducing Test Data Volume for Circular Scan Architecture Using Modified Shuffled Shepherd Optimization” Journal of Electronic Testing, Theory and Applications, Vol 37 Issue 5-6, Page No. 577 – 592. ISSN 0923-8174 (INDEXED in SCI)
Aswini Valluri, Sarada Musala and Muralidharan Jayabalan, “Design of Area Efficient, Low-Power and Reliable Transmission Gate-based 10T SRAM Cell for Biomedical Application” Journal of Engineering Research, Vol 10 No. 1(A), Page No. 161 – 174. ISSN: 2307-1877 (INDEXED in SCIE)