Logic Level Optimization, KPR Institute Engineering and Technology, Autonomous Engineering Institution, Coimbatore, India

Title
Logic Level Optimization

Hybrid Event
Logic Level Optimization
Expert Talk Dept. Level
DATE
Aug 30, 2024
TIME
11:00 AM to 12:15 PM
DEPARTMENT
EC
TOTAL PARTICIPATES
15
Logic Level Optimization
Summary

An expert lecture titled "Logic level optimization" was organized for the second year PG VLSI Design students. This is one of the topics in the second unit of their subject P23VLP20- Low Power VLSI Design. The students were able to understand the basic concepts of Logic level optimization and interpret how the optimzation can be achieved through different logic level functions. The expert speaker was Mr.Samuel Tensingh, Senior Member IEEE, Univeristy of Sydney, Australia. It was organized through online mode.


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